{"product_id":"designing-with-xilinx-r-fpgas-using-vivado","title":"Designing with Xilinx(r) FPGAs: Using Vivado","description":"\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003eChapter 1: State of the Art Programmable Logic 1\u003cbr\u003eChapter 2: Vivado Design Tools 17Chapter 3: IP Flows 23Chapter 4: Gigabit Transceivers 35Chapter 5: Memory Controllers 49Chapter 6: Processor Options 65Chapter 7: Vivado IP Integrator 75Chapter 8: SysGen for DSP 85Chapter 9: Synthesis 97Chapter 10: C Based Design 111Chapter 11: Simulation 127Chapter 12: Clocking 141Chapter 13: Stacked Silicon Interconnect (SSI) 155Chapter 14: Timing Closure 167Chapter 15: Power Analysis and Optimization 179Chapter 16: System Monitor 191Chapter 17: Hardware Debug 205Chapter 18: Emulation Using FPGAs 221Chapter 19: Partial Reconfiguration \u0026amp; Hierarchical Design 239\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cb\u003eAbout the Author\u003c\/b\u003e\u003cbr\u003e\u003cp\u003eSanjay Churiwala is Senior Director of Engineering for Xilinx India Technology Services. He has extensive experience in the field of EDA and semiconductors R\u0026amp;D, as well as customer-interaction. He specializes in Clock Domain Crossings and Synchronization, STA, Power, Synthesis, Simulation, Rule based static checkers, Cell Characterization and Modeling.\u003c\/p\u003e\u003cbr\u003e","brand":"Springer","offers":[{"title":"Default Title","offer_id":50367440781586,"sku":"9783319825816","price":98.99,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0831\/4771\/8930\/files\/img_917585e2-1380-4200-b82d-39b4237590c0.jpg?v=1728492869","url":"https:\/\/surprise-castle.myshopify.com\/products\/designing-with-xilinx-r-fpgas-using-vivado","provider":"Surprise Castle","version":"1.0","type":"link"}